JLPT N3 Exam in Houston
On the 1st of December, 2019, I went to Houston and took the JLPT N3 Exam in Rice University. The exam tests my ability to use the Japanese language.
2019 UK Graduation Trip (Continued)
This is the second post regarding the 2019 UK graduation trip. Please refer to this link for the previous post regarding the trip.
2019 UK Graduation Trip
During October of 2019, my family went to the UK to join the Commemoration Day to celebrate my graduation from Imperial College London as an undergraduate student. The post covers day 1 to day 5 of the trip. For day 6 to day 9, please refer to this link.
Verify the Central Limit Theorem by Simulation
Assignment for ECEN 646 Homework 5 Problem 4. Coded in Python.
HDL Editor Setup
Rationale:
The project intends to provide a simple solution for those who wish to generate structured Verilog HDL code from a GUI and is suitable for those who just start working with FPGA and Verilog HDL.
The implementation intends to use both the rich ecosystem of JavaScript and the feature of static typing. The Electron framework is used for generating a nice GUI and the Fable compiler is used to transpile F# to JavaScript.
Deploy using Travis CI or Not?
Background:
Previously the contents of the website were generated locally then pushed to a GitHub repository. Now Travis CI is used to generate static files instead of the local machine.
Monitoring Service
UptimeRobot is used to monitor the performance of the website. Servers or databases that will be used in future projects can also be monitored using the service.
A status page is accessible at status.wilsonwang.org.
HDL Editor Development Log
The HDL Editor project is an extension to my undergraduate final year project. This article serves as a table of contents for the posts on re-creating and improving the project.
Graduate First Year Courses
The courses for the academic year of 2019-2020 are listed as the following: